From 8e784a748cf3ab2aa4567b3f9a612e790d963873 Mon Sep 17 00:00:00 2001
From: admin <zhyaction@foxmail.com>
Date: Wed, 9 Sep 2026 10:39:52 +0800
Subject: [PATCH] =?UTF-8?q?Fix=20#39:=20Ascend950DT=20L2=20=E5=B8=A6?=
 =?UTF-8?q?=E5=AE=BD=E5=AE=9A=E4=B8=BA=207.5TB/s=20(=E8=AF=BB=E5=86=99?=
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- 用户澄清口径: 950DT L2 = 7.5TB/s, 读写各自独享 (白皮书未分档,
  issue#38 曾沿用 950PR 的 5.2TB/s 待标定)
- ascend950dt.py: 三个 DT SKU (36/32/28核) bw_l2 = 7.5e12, 文档串同步
- 模型无结构改动: bw_l2 单字段本就是"读口/写口各自独享"语义
  (L2 重复读与 Fixpipe→L2 写分开计账, assemble_timing issue#23 口径);
  950PR 各档维持 5.2TB/s
- tests: DT 三档 bw_l2=7.5e12 / PR 两档 5.2e12 锁定 + bw_l2_pc 派生 +
  S_A 场景 DT fixpipe 走 7.5TB/s 写口端到端验证; 88/88 通过;
  examples 44 例 0 diff; 压力回归 10000 例干净
---
 BMM/BMM_Theory/bmm_theory/hardware/ascend950dt.py | 11 ++++++++---
 BMM/BMM_Theory/tests/test_branches.py             | 15 +++++++++++++++
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/BMM/BMM_Theory/bmm_theory/hardware/ascend950dt.py b/BMM/BMM_Theory/bmm_theory/hardware/ascend950dt.py
index 6f279f4..6dc9a5f 100644
--- a/BMM/BMM_Theory/bmm_theory/hardware/ascend950dt.py
+++ b/BMM/BMM_Theory/bmm_theory/hardware/ascend950dt.py
@@ -15,20 +15,23 @@
   - Vector fp32: 27T/64核 ≈ 30T/72核 -> 128 lane/拍 @ 1.65GHz (乘加计 2 次),
     即 aiv_freq_ghz / aiv_fp32_per_cycle 默认值直接适用;
   - L1 512KB / L0A/L0B 64KB / L0C 256KB / UB 512KB 每核一致 (表4-2);
-  - L2 带宽白皮书未分档, 沿用 5.2TB/s 待标定; 搬移效率经验值
-    (dValue/minTile/minDatamountPerCore/T_cmd=0) 同架构沿用 950PR 口径.
+  - L2 带宽 7.5TB/s, 读写各自独享 (issue#39 用户澄清; 白皮书未分档,
+    DT 三档统一); 搬移效率经验值 (dValue/minTile/minDatamountPerCore/
+    T_cmd=0) 同架构沿用 950PR 口径.
 """
 
 from __future__ import annotations
 
 from .ascend950pr import NpuSpec
 
-# 950DT 36 核主 bin (白皮书表3-1: 36 AIC / 72 AIV, HBM 4TB/s 144GB, L2 128MB)
+# 950DT 36 核主 bin (白皮书表3-1: 36 AIC / 72 AIV, HBM 4TB/s 144GB, L2 128MB;
+# L2 带宽 7.5TB/s 读写各自独享, issue#39)
 ASCEND950DT = NpuSpec(
     name="Ascend950DT",
     aic_num=36, aiv_num=72,
     cube_peak_tflops=547.0,
     bw_gm=4.0e12,
+    bw_l2=7.5e12,
     gm_capacity_gb=144.0,
 )
 
@@ -38,6 +41,7 @@ ASCEND950DT_C32 = NpuSpec(
     aic_num=32, aiv_num=64,
     cube_peak_tflops=486.0,
     bw_gm=4.0e12,
+    bw_l2=7.5e12,
     gm_capacity_gb=144.0,
 )
 
@@ -48,5 +52,6 @@ ASCEND950DT_C28 = NpuSpec(
     aic_num=28, aiv_num=56,
     cube_peak_tflops=425.0,
     bw_gm=4.0e12,
+    bw_l2=7.5e12,
     gm_capacity_gb=96.0,
 )
diff --git a/BMM/BMM_Theory/tests/test_branches.py b/BMM/BMM_Theory/tests/test_branches.py
index 0347424..97fbd4f 100644
--- a/BMM/BMM_Theory/tests/test_branches.py
+++ b/BMM/BMM_Theory/tests/test_branches.py
@@ -1038,6 +1038,7 @@ class TestIssue38(unittest.TestCase):
         s = ASCEND950PR
         self.assertEqual((s.aic_num, s.aiv_num), (32, 64))
         self.assertEqual(s.bw_gm, 1.6e12)
+        self.assertEqual(s.bw_l2, 5.2e12)               # PR 保持 5.2TB/s
         self.assertEqual(s.l2_bytes, 128 * 1024 * 1024)
         self.assertAlmostEqual(s.q16, 486e12 / 32)
         self.assertEqual(s.gm_capacity_gb, 128.0)
@@ -1066,6 +1067,10 @@ class TestIssue38(unittest.TestCase):
         self.assertEqual(ASCEND950DT.l2_bytes, 128 * 1024 * 1024)
         self.assertEqual(ASCEND950DT.gm_capacity_gb, 144.0)
         self.assertEqual(ASCEND950DT.cube_peak_tflops, 547.0)
+        # L2 带宽: DT 三档 7.5TB/s 读写各自独享 (issue#39 用户澄清)
+        for dt_spec in (ASCEND950DT, ASCEND950DT_C32, ASCEND950DT_C28):
+            self.assertEqual(dt_spec.bw_l2, 7.5e12)
+        self.assertAlmostEqual(ASCEND950DT.bw_l2_pc, 7.5e12 / 36)
         self.assertEqual((ASCEND950DT_C32.aic_num,
                           ASCEND950DT_C32.cube_peak_tflops), (32, 486.0))
         self.assertEqual((ASCEND950DT_C28.aic_num,
@@ -1084,6 +1089,7 @@ class TestIssue38(unittest.TestCase):
         self.assertEqual((ASCEND950PR_C28.aic_num,
                           ASCEND950PR_C28.aiv_num), (28, 56))
         self.assertEqual(ASCEND950PR_C28.bw_gm, 1.4e12)
+        self.assertEqual(ASCEND950PR_C28.bw_l2, 5.2e12)  # PR 系列保持 5.2TB/s
         self.assertEqual(ASCEND950PR_C28.l2_bytes, 112 * 1024 * 1024)
         self.assertEqual(ASCEND950PR_C28.gm_capacity_gb, 112.0)
 
@@ -1100,6 +1106,15 @@ class TestIssue38(unittest.TestCase):
         r_pr = BranchRouter().route(case)
         self.assertGreater(r_dt["timing"].t_total, 0.0)
         self.assertLess(r_dt["timing"].t_mte2_gm, r_pr["timing"].t_mte2_gm)
+    def test_dt_l2_bw_effective_in_fixpipe(self):
+        # issue#39: S_A (整case驻留L2) 下 DT 的 fixpipe 走 7.5TB/s 写口
+        from bmm_theory.hardware import ASCEND950DT
+        case = mkcase(2, 4096, 4096, 512)   # 输入+输出 < 128MB -> S_A
+        self.assertLess(case.input_bytes + case.output_bytes,
+                        ASCEND950DT.l2_bytes)
+        r = BranchRouter(ASCEND950DT).route(case)
+        self.assertAlmostEqual(r["timing"].t_fixpipe,
+                               case.output_bytes / 7.5e12)
 
 
 if __name__ == "__main__":