diff --git a/BMM/BMM_Theory/bmm_theory/branches/special.py b/BMM/BMM_Theory/bmm_theory/branches/special.py
index 095991c..2b765c7 100644
--- a/BMM/BMM_Theory/bmm_theory/branches/special.py
+++ b/BMM/BMM_Theory/bmm_theory/branches/special.py
@@ -24,14 +24,11 @@ class SpecialBranch(Branch):
         c1 = case.k <= 1
         checks = [ConditionCheck("1_K<=1 (Cube 无用)", c1, f"K={case.k}")]
         if case.k == 1:
-            # K=1 的 AIV 通路恒可用 (issue#12): B>=2*AIV 开 UB 乒乓; B<128 退化为
-            # AIV 单缓冲 (无乒乓, 逐 batch 串行搬入), 不再是无方案空洞.
-            b = case.batch_c
-            pingpong = b >= 2 * self.spec.aiv_num
-            mode = "UB乒乓" if pingpong else "AIV单缓冲(逐batch串行, B<2*AIV)"
+            # K=1 触发 AIV 通路需 B >= 2*AIV核数 且单 batch 输入输出能驻留 UB
+            c2 = case.batch_c >= 2 * self.spec.aiv_num
             checks.append(ConditionCheck(
-                "2_K=1的AIV通路: 恒可用 (B>=128 开UB乒乓, 否则单缓冲)",
-                True, f"B={b}, 模式={mode}"))
+                "2_K=1的AIV触发: B >= 2*AIV核数 (开UB乒乓)",
+                c2, f"B={case.batch_c} vs {2*self.spec.aiv_num}"))
         return checks
 
     # ------------------------------------------------------------------
@@ -39,15 +36,11 @@ class SpecialBranch(Branch):
         s = self.spec
         if case.k == 0:
             sub = "K=0纯写值"
-            mode = ""
             note = "无任何计算, C=bias 或 0, 纯 AIV 写值; 按行均分到 AIV 核"
         else:
             sub = "K=1逐元素乘"
-            pingpong = case.batch_c >= 2 * s.aiv_num
-            mode = "UB乒乓" if pingpong else "AIV单缓冲"
-            note = (f"退化为 C=A⊙B 无累加深度, Cube 16x16x16 粒度浪费 15/16; "
-                    f"走 AIV 通路 GM->UB->Mul->GM, {mode} "
-                    f"({'B>=2*AIV 双batch乒乓流水' if pingpong else 'B<2*AIV 逐batch单缓冲串行'})")
+            note = ("退化为 C=A⊙B 无累加深度, Cube 16x16x16 粒度浪费 15/16; "
+                    "走 AIV 通路 GM->UB->Mul->GM, UB 乒乓")
         return ImplPlan(
             case_id=case.case_id, branch=self.name,
             used_core_num=s.aiv_num,  # 用 AIV 核
@@ -55,8 +48,7 @@ class SpecialBranch(Branch):
             core_map="AIV 核间按行均分 (无 Cube tile 概念)",
             b_core=0, merge_b0=1,
             single_core_m=0, single_core_n=0, single_core_k=case.k,
-            k_l1=0, b_l1=1,
-            l1_form="UB驻留(AIV)" if case.k == 0 else "UB驻留(AIV) " + mode,
+            k_l1=0, b_l1=1, l1_form="UB驻留(AIV)",
             base_m=0, base_n=0, base_k=0,
             l2_policy_in="allocate", l2_policy_out="direct_gm",
             swizzle_w=0, workspace_bytes=0,